1. Field of the Invention
The invention relates to a semiconductor device, and in particular to a semiconductor device having a super junction structure and a fabricating method thereof.
2. Description of the Related Art
FIG. 1 illustrates a cross section of a conventional N-type vertical double-diffused MOSFET (VDMOSFET). The VDMOSFET 10 includes a semiconductor substrate and a gate structure thereon. The semiconductor substrate has an N-type epitaxial drift region 100 and a P-type base region 102 thereon to form a P-N junction. Moreover, a drain region 106 is under the N-type epitaxial drift region 100 and is connected to a drain electrode 114. The P-type base region 102 has a source region 104 therein and is connected to a source electrode 112. The gate structure is constituted by a gate dielectric layer 108 and a gate electrode 110 thereon.
In order to increase the withstand voltage of the P-N junction in the VDMOSFET 10, it is required to reduce the doping concentration of the N-type epitaxial drift region 100 and/or increase the thickness thereof. However, when the withstand voltage of the P-N junction is increased by such an approach, the turn on resistance (Ron) of the VDMOSFET 10 must be increased. Namely, the turn on resistance is limited by the doping concentration and the thickness of the N-type epitaxial drift region 100.
A VDMOSFET having a super junction structure may increase the doping concentration of the N-type epitaxial drift region so as to increase the withstand voltage of the P-N junction, while being capable of preventing the turn on resistance from increasing. In a conventional art, the super junction structure is formed by a multi-epi technology. Such a multi-epi technology requires repeatedly performing the epitaxial growth, P-type doping and high temperature diffusion processes, and therefore the multi-epi technology has drawbacks such as having complicated processes, high manufacturing costs and having a hard time when trying to miniaturize the device size.
Accordingly, there exists a need in the art for development of a semiconductor device having a super junction structure, capable of mitigating or eliminating the aforementioned problems.